Section 13.2 SRAM Data Memory
The ATmega328P contains 2k B (refer to Section 10.7.1 of [16.20] for a more in-depth discussion on memory capacity and the meaning of binary prefixes) of volatile SRAM memory. (SRAM memory was introduced in Subsection 2.6.1.) Because all of this data is volatile, the contents will be erased and reset to zero any time power is removed from the microcontroller.
The SRAM on the ATmega328P is partitioned into multiple different sections, each of which is explained below. The memory map is shown in Figure 13.2.1.
All data memory is stored in 8-bit words. (Data larger than 8 bits are stored in multiple addresses as needed.) This means that each word size is 1 byte. Data memory requires 11 bits to be fully addressed, as calculated in (13.2.1). (However, each of the components of data memory may not require a full 11 bits to address, as described in Section 13.4.)
\begin{equation}
\lceil\log_2{2\textrm{k}}\rceil = 11~\textrm{bits}\tag{13.2.1}
\end{equation}
Subsection 13.2.1 32 General Purpose Registers
These 32 general purpose registers contain information to be entered into the ALU on the microcontroller. They are used to execute instructions. These can be considered to be temporary storage used to store the operands of an instruction. (For example, when adding two values together, those two values will be stored in general purpose registers before being summed. The result will then be stored into a general purpose register.)
Registers
r26 to r31 are indirect address registers (which may also be referred to as pointer registers). They are used in pairs to indirectly address data memory (as described in Subsection 13.4.4). The Z register can also be used to indirectly address program memory (as described in Subsection 13.4.5). Each pointer register is described in Table 13.2.2.
| Pointer Register | High Byte | Low Byte |
|---|---|---|
X |
r27 |
r26 |
Y |
r29 |
r28 |
Z |
r31 |
r30 |
Subsection 13.2.2 64 I/O Registers
In addition to the general purpose registers, data memory contains 64 I/O registers. This memory space contains the
PINx, PORTx, and DDRx registers, as well as registers that control the operation of timer/counter 0, SPI communication, and external interrupts, among others.
These registers can be directly addressed using assembly instructions (as described in Subsection 13.4.3). When using instructions such as
LOAD, data from the 64 I/O registers will be loaded into the general purpose registers to allow further instructions to make use of that data.
Subsection 13.2.3 160 Extended I/O Registers
There are a lot more peripheral units than can be supported with 64 memory locations, therefore there are an additional 160 extended I/O registers that control all of the other peripheral features of the ATmega328P, including serial communication, interrupts, timer/counters, ADC, and more. These memory locations can only be accessed indirectly using load and store instructions in assembly (which takes more clock cycles than the direct addressing that can be used on the 64 I/O registers).
Subsection 13.2.4 Internal SRAM
The remaining data space is used to store variable data in memory. For example, if a circular buffer (as introduced in Subsection 7.3.1) is used to save sensor data, those values will be stored in internal SRAM. Because this data pertains to current environmental conditions, this data does not need to be stored permanently.
The highest memory addresses in internal SRAM are used to store the stack, which is introduced in Section 13.5.
