External Interrupts on the ATmega328P

$\newcommand{\N}{\mathbb N} \newcommand{\Z}{\mathbb Z} \newcommand{\Q}{\mathbb Q} \newcommand{\R}{\mathbb R} \newcommand{\lt}{<} \newcommand{\gt}{>} \newcommand{\amp}{&} \definecolor{fillinmathshade}{gray}{0.9} \newcommand{\fillinmath}[1]{\mathchoice{\colorbox{fillinmathshade}{$\displaystyle \phantom{\,#1\,}$}}{\colorbox{fillinmathshade}{$\textstyle \phantom{\,#1\,}$}}{\colorbox{fillinmathshade}{$\scriptstyle \phantom{\,#1\,}$}}{\colorbox{fillinmathshade}{$\scriptscriptstyle\phantom{\,#1\,}$}}} $

Section 8.2 External Interrupts on the ATmega328P

Two external interrupts can be enabled to generate an interrupt request upon particular conditions on two different pins (INT0 and INT1) on the ATmega328P. Each of the two interrupts can be independently enabled in the external interrupt mask register (EIMSK), and the specific trigger conditions are programmed in the external interrupt control register A (EICRA).

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The trigger conditions that can be selected for the two external interrupts are on a

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LOW signal,
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toggle,
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falling edge, or
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rising edge.
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The utility of these two interrupts is that each individual interrupt can be uniquely triggered and has its own corresponding ISR. This means that the exact status of the pin is known at the moment the ISR is invoked. However, these interrupts are only available on two of the approximately 20 I/O pins on the ATmega328P.

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