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Microcontrollers

Alyssa J. Pasquale, Ph.D.

Section 15.4 Bit Manipulation Instructions

Bit manipulation instructions consist of instructions that allow registers to be manipulated on the bit level. This consists of shifting, swapping, setting, and clearing instructions.
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Subsection 15.4.1 Shift Instructions

Shift instructions come in a few varities: logical shift, arithmetic shift, and rotate through carry.
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A logical shift is equivalent to bitshift operations in C. When a register is logically shifted right (using the LSR instruction), the MSB is replaced with a 0. When a register is logically shifted left (using the LSL instruction), the LSB is replaced by a 0. While C code is able to perform multiple bitshifts at a time, each shift instruction in assembly executes a single position at a time. Iterative control flow can be used to execute multiple bit shifts.
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In an arithmetic shift right (which is the ASR instruction, no such arithmetic shift left exists as it would be equivalent to logical shift left), the sign bit is shifted in to the MSB of the register. This is equivalent to dividing a signed or unsigned binary value by two by preserving the sign bit.
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Rotate through carry instructions can occur to the left (using the ROL instruction) or right (using the ROR instruction), and execute a rotation (where the register wraps around so the MSB is moved to the LSB, or vice versa) through the previous value of the carry bit. These instructions are particularly useful when dealing with values that are stored in two registers (i.e., the numbers are greater than 8 bits). When rotating, the value that is rotated out is saved into the carry flag of SREG and is therefore ready to be rotated in to the next byte without the need for additional processing.
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The rotate left through carry instruction (ROL) is depicted graphically in Figure 15.4.1.
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The value in a register is depicted as 8 squares. They are labeled 7 through 0. To the right of the squares is a separate square labeled C. The top values of each square are 01101001 for the register value and 1 for the C value. Below are values after the shift. The register values are 11010011 and the C value is 0.
Figure 15.4.1. Rotate left through carry.
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The rotate right through carry instruction (ROR) is depicted graphically in Figure 15.4.2.
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The value in a register is depicted as 8 squares. They are labeled 7 through 0. To the right of the squares is a separate square labeled C. The top values of each square are 01101001 for the register value and 1 for the C value. Below are values after the shift. The register values are 10110100 and the C value is 1.
Figure 15.4.2. Rotate right through carry.
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Subsection 15.4.2 Swap Instruction

The swap nibbles instruction (SWAP) swaps the high and low nibbles in the operand register.
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Subsection 15.4.3 Store, Set, and Clear Instructions

A single bit of storage is available in the bit copy storage flag (T) in SREG. Storing data to this flag is accomplished using the bit store from register to T instruction (BST), while retrieving data from this flag is accomplished using the bit load from T to register instruction (BLD).
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The last set of bit manipulation instructions pertain to setting and clearing bits. Bits can be set and cleared individually in an I/O register using the set bit in I/O register instruction (SBI) and clear bit in I/O register instruction (CBI).
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Individual bits in SREG can be set and cleared using the flag set instruction (BSET) and flag clear instruction (BCLR).
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Each individual flag in SREG can be set or cleared using their own individual instructions.
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  • The global interrupt enable flag (I) can be set with the global interrupt enable instruction (SEI) and cleared with the global interrupt disable instruction (CLI).
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  • The bit copy storage flag (T) can be set with the set T in SREG instruction (SET) and cleared with the clear T in SREG instruction (CLT).
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  • The half carry flag (H) can be set with the set half carry flag in SREG instruction (SEH) and cleared with the clear half carry flag in SREG instruction (CLH).
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  • The sign flag (S) can be set with the set signed test flag instruction (SES) and cleared with the clear signed test flag instruction (CLS).
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  • The two’s complement overflow flag (V) can be set with the set two’s complement overflow instruction (SEV) and cleared with the clear two’s complement overflow instruction (CLV).
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  • The negative flag (N) can be set with the set negative flag instruction (SEN) and cleared with the clear negative flag instruction (CLN).
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  • The zero flag (Z) can be set with the set zero flag instruction (SEZ) and cleared with the clear zero flag instruction (CLZ).
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  • The carry flag (C) can be set with the set carry instruction (SEC) and cleared with the clear carry instruction (CLC).
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