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Microcontrollers

Section 9.1 The ATmega328P Clock Unit

The ATmega328P has two internal clock sources: an 8ย MHz RC oscillator and a 128ย kHz lower power oscillator. An external clock (connected to the XTAL1 pin) or a crystal or ceramic oscillator (connected to the XTAL1 and XTAL2 pins) may be used instead of one of the internal oscillators. The clock source is selected by changing fuse bits in the low fuse byte (as described in Subsectionย 4.7.3).
The ATmega328P is rated for a fastest clock speed of 16ย MHz. It has no clock multiplier. Prescaling is possible globally (which will impact all peripherals as well as the execution time of software code itself) and also independently (each peripheral may be independently prescaled without affecting the global clock and program code execution speed).
The factory default setting of an ATmega328P microcontroller is set to use the 8ย MHz oscillator with a prescaler of 8, leading to a system clock frequency of 1ย MHz.
The clock control unit, as shown in Figureย 9.1.1, routes the clock signals to all device peripherals, as different peripherals may require their own clock frequencies.
Five input sources are labeled as timer/counter oscillator, external clock, crystal oscillator, low-frequency crystal, and calibrated RC oscillator. The timer/counter oscillator goes directly to the AVR clock control unit. The other sources are inputs to the clock MUX. The calibrated RC oscillator also goes directly to the flash and EEPROM peripheral. An additional input to the AVR clock control unit is the watchdog oscillator, which also connects to the watchdog timer peripheral. The clock MUX output connects to the system clock prescaler. The output of the system clock prescaler is an input to the AVR clock control unit. The AVR clock control unit generates five output signals. CLK_ASY connects to the asynchronous timer/counter peripheral. CLK_I/O connects to the asynchronous timer/counter peripheral and the general I/O modules peripheral. CLK_ADC connects to the ADC peripheral. CLK_CPU connects to the CPU core as well as the RAM. CLK_FLASH connects to the flash and EEPROM peripheral.
Figure 9.1.1. Block diagram of the AVR clock unit.
The system clock prescaler is set by the clock prescale register (CLKPR) and will affect both the frequency of operation of the microcontroller as well as all peripheral clock signals.
Each peripheral clock is described below.
  • The CPU clock (\(CLK_{CPU}\)) is routed to all parts involved with core operations.
  • The I/O clock (\(CLK_{I/O}\)) is routed to all parts involved with input and output operations, including each I/O port, timer/counters, serial communication peripherals, and external interrupts.
  • The flash clock (\(CLK_{FLASH}\)) is routed to the program memory. The flash and EEPROM modules have direct access to the calibrated RC oscillator. This is because itโ€™s important to have access to program memory when externally programming the chip, even without the CPU running.
  • The asynchronous clock (\(CLK_{ASY}\)) allows the asynchronous timer/counter to be clocked directly from an external source.
  • The ADC clock (\(CLK_{ADC}\)) is used to power the ADC independently of the CPU clock. The ADC can be run with the CPU clock off to reduce noise and increase the precision of the analog to digital conversion process.