ADC on the ATmega328P

Section 6.4 ADC on the ATmega328P

The ATmega328P contains a 10-bit successive approximation register (SAR) ADC. A block diagram of the ATmega328P ADC is shown in Figure 6.4.1.

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The data bus connects bidirectionally to ADMUX, ADC status and control registers, and the ADC data registers. The ADMUX register connects to control bits on two MUXes. One of the MUXes has an input connected to different input sources. The output of that MUX connects to the non-inverting input of an analog comparator. The other MUX has an input connected to different reference sources. The output of that MUX connects to the input of a 10-bit DAC, whose output connects to the inverting input of the analog comparator. The SAR conversion logic connects to the ADC status and control register and also acts as an input to the DAC. The output of the analog comparator connects to the SAR conversion logic. The SAR conversion logic writes to the ADC data registers. — Figure 6.4.1. Block diagram of the ADC in the ATmega328P.
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The ADC contains the following features:

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ADMUX register allows for the selection of different input sources and reference voltages.
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An internal temperature sensor can be used as one of the input sources.
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Triggering can occur based on the condition saved in ADCSRB.
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Different prescalers (Chapter 9) can be used based on the condition saved in ADCSRA.
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The result can be easily accessed either as an 8-bit value or a 10-bit value.
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An interrupt can be enabled to invoke upon a successful conversion.
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An analog multiplexer is used to select from multiple different input sources (including all of the pins on port C). The input source is selected by configuring the ADC multiplexer selection register (ADMUX). This is depicted in Figure 6.4.2. (The number of available input sources depends on the package of the ATmega328P. The 28-pin chips do not contain pins for ADC6 and ADC7. However, the 32-pin chips do.)

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The minimum voltage level is 0 V (ground) and the reference voltage can be selected from different sources (either an externally applied reference voltage AREF, the value on pin AVCC, or 1.1 V). The voltage reference source is selected by configuring the ADMUX register. This is also depicted in Figure 6.4.2. The reference voltage cannot be larger than VCC.

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Circuit diagram. A 16 to 1 MUX is used to select between the different input sources and uses control bits 3:0 in ADMUX. This goes to the input of the ADC on the ATmega328P. A 4 to 1 MUX is used to select the reference voltage to the ADC on the ATmega328P. The control bits on this MUX are bits 7:6 in ADMUX. — Figure 6.4.2. Circuit diagram of the input source and reference voltage selection on the ATmega328P analog to digital converter. The input source and reference voltage are both selected based on configuration bits in `ADMUX`.
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When using AVCC as the reference voltage using the ATmega328P, the AVCC chip should be connected with a low-pass filter as shown in Figure 6.4.3. This circuit removes high-frequency noise from disrupting the reference voltage value, keeping it at a constant value. Otherwise, if the reference voltage fluctuates due to noise, the resulting output value may not be accurate.

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Circuit diagram. Between AVCC and VCC is a 10 uH inductor. Between AVCC and GND is a 100 nF capacitor. — Figure 6.4.3. Circuit diagram of the low-pass filter that should be connected to the AVCC pin.
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Additional information about the ATmega328P’s ADC is available in [16.14], [16.16], [16.17], and [16.18].

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Subsection 6.4.1 Resolution

The ADC on the ATmega328P is 10 bits, meaning the output stored in the ADC data register(s) will be between 0-1023. The converted binary data is stored between two 8-bit registers ADCH and ADCL. When using the ADC in full-precision (10-bit) mode, the ADC left adjust result (ADLAR) bit in the ADMUX register should be cleared, enabling the use of the variable ADC which accesses the full 10-bits of data.

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When using the ADC in full-precision mode, an ADC frequency of 50-200 kHz is required. (Depending on the clock source used to operate the microcontroller, this will affect the prescaler used to operate the ADC.)

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It is also possible to obtain lower-precision data from the ADC. Simply store the most significant \(n\) bits of data to obtain an \(n\)-bit precision value! Typically, 8-bit precision is convenient as it lends itself nicely to the bit-width of the microcontroller in general. In this case, the ADLAR bit can be set and the variable ADCH will contain the 8-bit result of the ADC.

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Lower resolution can be obtained by setting ADLAR and bitshifting the ADCH register to the right as many bits as desired. (For example, bitshift right four times to obtain a 4-bit value.)

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Subsection 6.4.2 Data Triggering and Sampling

When using the ADC on the ATmega328P, the sample rate can be selected by configuring the trigger source for the ADC. If the ADC auto trigger enable (ADATE) bit is set in ADC control and status register A (ADCSRA), the ADC can be set to run continuously in free-running mode or can sample on particular trigger events given by the trigger source selected in ADC control and status register B (ADCSRB).

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With the exception of the first conversion, which requires 38.5 clock cycles to complete, auto triggered conversions require 15.5 clock cycles to complete. Other conversions require 14.5 clock cycles to complete. This includes the clock cycles required to sample and hold data as well as to convert the sampled data to a digital value and store it in the ADC data registers.

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In contrast, single conversions are possible by clearing the ADATE bit. In this case, data can be sampled from the ADC on demand by setting the ADC start conversion (ADSC) bit in ADCSRA. This is strongly recommended if there is any need to change the input source using ADMUX. When auto triggering is enabled, updating the ADMUX register can lead to indeterministic timing of the ADC trigger, which can lead to unpredictable results.

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When selecting between multiple ADC input sources, use single conversion mode by clearing ADATE. Set ADSC when ready to make a conversion. After the conversion is complete, save the result and select the new input channel by reconfiguring ADMUX. Then, this cycle can be repeated.

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The length of each clock cycle on the ADC depends on the frequency of the clock source as well as the configuration of something called a prescaler (both of which will be discussed in Chapter 9). The ADC prescaler can be set independently of other prescalers used for other peripheral features on the microcontroller.

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