Section 9.8 ATmega328P Watchdog Timer (WDT)
The watchdog timer (WDT) is a feature on AVR microcontrollers that allows for system resets if the program is unresponsive after a certain period of time. [16.2] The WDT is clocked with a 128Â kHz clock that is independently of the on-chip oscillator. The WDT has three operating modes, which are
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interrupt,
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system reset, and
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interrupt then system reset.
The WDT is a timer that will increment at intervals of time given by the 128Â kHz clock and the WDT prescaler. The prescaler is configured with the watchdog timer prescaler bits (
WDP) in the watchdog timer control register (WDTCSR). Whenever the WDT is reset (using the machine instruction WDR), the timer will reset to zero. However, if the WDT overflows, the WDT will either invoke an interrupt, reset the system, or invoke an interrupt and then reset the system (based on the selection made in WDTCSR).
In this manner, the WDT can be used to restart the microcontroller program after a certain time interval, which can be beneficial for avoiding unresponsive code or runaway timing errors. Alternatively (or in addition), an interrupt can be invoked that can be used to store important program information or wake up from a sleep mode.
