Section 9.2 ATmega328P Timer/Counters
Timer/counters are integral in the use of timed interrupts and in the generation of square waves. An incrementing counter counts up values from \(0\) to \(2^n-1\text{,}\) where \(n\) is the resolution of the counter. After reaching the maximum value of \(2^n-1\text{,}\) the counter overflows back to 0 and continues incrementing again. This process repeats indefinitely. (A decrementing counter counts down from \(2^n-1\) to \(0\text{,}\) then overflows back to \(2^n-1\text{.}\))
A timer is simply a counter that is clocked with the CPU clock. Timer/counters are used to generate waveforms (for example in pulse-width modulation), measure time intervals, generate interrupts at specific intervals, and capture or count external events.
There are three timer/counters on the ATmega328P.
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Timer/counter 0: 8 bits of resolution
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Timer/counter 1: 16 bits of resolution
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Timer/counter 2: 8 bits of resolution
Subsection 9.2.1 Clock Sources
Each counter can be independently configured and can also be assigned its own prescaler value to allow for operation at independent frequencies. [16.4]
There are different clock sources that can be used for each timer/counter to provide flexibility in timing. The first option, available on all three timer/counters, is to use the CPU clock. Each timer/counter can be independently prescaled to obtain particular timing outcomes. However, each timer/counter has a finite number of prescaler values available to use.
The second option, available on timer/counters 0 and 1, is to use an external clock. The microcontroller then synchronizes the external clock to the system clock. This limits the range of allowable frequencies of the external clock. Because it is sampled by the CPU clock, it must be slower than half the frequency of the CPU clock. (In fact, the ATmega328P datasheet recommends that the maximum external clock frequency be no greater than the CPU clock divided by 2.5.) This external clock frequency cannot be prescaled. While an external clock is being used, due to the synchronization of the CPU clock, this is not a truly asynchronous timing option.
The last option, available only on timer/counter 2, is to use a truly asynchronous oscillator. That is, the oscillator will independently clock the timer/counter without any synchronization to the CPU clock. Timing events (such as interrupts) will by definition occur outside of the timescale of the CPU clock, yet the CPU clock drives all of the hardware that deals with those events. Therefore, it is still necessary to limit the frequency of the asynchronous clock. It is recommended that the frequency be at least four times less than the CPU clock. In particular, the asynchronous timer/counter is meant for 32,768 Hz oscillators which, when prescaled, can be used to develop real time clocks. [16.6]
Subsection 9.2.2 Timer/Counter Unit
Each of the timer/counter units can be simplified as a block diagram as shown in Figure 9.2.1. For each timer/counter, the variable
n corresponds to the timer/counter number.
The definitions described below are important to understand the operation of each timer/counter.
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top: defined as the highest value in the count sequence -
direction: may be defined to increment or decrement the counter (note that this direction cannot be directly modified; the timer/counter units will only decrement in phase-correct PWM mode) -
count: a signal used to increment/decrement the counter -
\(CLK_{Tn}\text{:}\) timer/counter n clock signal
